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BRINGUP: record audit Phase 8 - the kernel rows are complete
All kernel/image fixes across the audit phases now wait on the one image build + flash; Phase 8 bench items listed.
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# ForgeFIRM bring-up status & cold-start runbook
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Last updated: **2026-08-14** — **audit remediation Phases 0 through 7
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Last updated: **2026-08-14** — **audit remediation Phases 0 through 8
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landed** (from an independent whole-tree audit dated 2026-08-13; the
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remediation is sequenced behind two gates — GATE A, uncommanded energy,
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before any further live-fire; GATE B, control surface + release, before
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any published release).
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any published release). **Phase 8 completes the kernel rows: every
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kernel/image fix from Phases 1, 2 (B-3), 3, 5, 6, and 8 — plus the
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platform-hygiene batch and the gap-refire kernel half — is now
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code-complete and waiting on the ONE image build + flash.**
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**Phase 8 (kernel-module hardening) is code-complete; rides the image
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flash.** Probe: `/dev/glowforge` registers last so the error unwind can
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never deregister a device userspace already opened; the unwind clears
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the SDMA interrupt callback (previously dangling into devm-freed driver
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data across an `-EPROBE_DEFER` cycle) and releases the state dirent
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(K-7). Remove: every userspace surface comes down before the hardware —
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a concurrent attribute read can no longer reach `gpio_get_value` on
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freed descriptors — and the dirent is `sysfs_put`, not leaked (K-8).
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The fan-tach spinlock is initialized and taken in the IRQ handler (the
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cooling engine's fan verdicts ride these two 64-bit timestamps, which
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tear on arm32 unlocked) (K-9); tach IRQ setup cleans up after itself
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and records only actually-requested IRQs, with idempotent teardown
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(K-10). The LED trigger removes its attributes before the sync timer
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delete and serializes the simulation step against its store handlers
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(K-15). The kernel dead-man now **halts instead of disabling** — no
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40 V rail drop, so a crash recovery is never left in the exact state
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that wedges the DRV8825 drivers (K-18). Bounds: the safing-path
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pin-change off-by-one (K-14); `ignored_faults` capped to the documented
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0–7 with the probe fault state decided on the masked value (K-16);
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`PIN_LASER_ON_HEAD` joins the SDMA pin set and the stop/shutdown
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change sets (K-19); the run-start no-data gate refuses the run on a
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failed head fetch (K-20); PIC single-register writes reject values
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above the documented 10-bit range instead of wrapping (K-21).
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**Bench (on the flashed image):** module load/unload clean under
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`CONFIG_DEBUG_MUTEXES`; forced `-EPROBE_DEFER` unwinds without a
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dangling callback; concurrent `cat` during remove does not fault; the
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Phase 1/3/5/6 kernel drills all re-run green on this one image.
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**Phase 6 (motion integrity) is code-complete and host-verified.** A
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mid-run underrun or stepper fault is no longer silently absorbed: the
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