memory: run-3c probe answered — 79.3 s/it, and it reverses the plan on file
The GX10 runs run 3c at about 79.3 s/it with 35 GB of headroom, which puts 604 steps at 13.3 hours against ana-ml2's 2.2 to 2.7. Six times slower where raw compute predicts 2.7, which points at memory bandwidth rather than FLOPs -- recorded as a hypothesis, since confirming it needs a bandwidth-bound microbenchmark nobody has run. That reverses the standing plan. Moving run 3c here was framed as the power answer, but the run did not die because ana-ml2 is unreliable. It died because save_steps was 100 and the breaker tripped at step 80, so no checkpoint existed. save_steps is now 50, which caps a power event at about eleven minutes. Trading 2.5 hours for 13.3 buys insurance against a risk already engineered out. Also records the five launch failures and their causes, and the one that matters most: the attention-backend trap was present and I first declared it absent. I checked whether flash-attn was installed, which is the wrong discriminator; the harness sets flex_attention explicitly in code. Absence of an alternative is not evidence of the default. The probe now reads the resolved backend back off the loaded model, and flex_attention does compile and run on sm_121.
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@@ -312,3 +312,71 @@ padding on the real run is 0.0% so the corpus does not change per-step cost mate
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direct because ana-ml2's key is not authorised for `infra-ops@pfi-gx10` — and relaying costs
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nothing extra, since the Wi-Fi leg is the bottleneck either way. **Deliberately did not add an
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access grant just to save a hop.**
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## `[2026-09-02]` RUN-3c THROUGHPUT PROBE — ANSWERED. ~79.3 s/it, and the box is 6x slower than ana-ml2
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### The number
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pfi-gx10 79.30 / 79.37 / 79.33 / 79.45 s/it (0.19% spread across timed steps)
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-> 604 steps ~= 13.3 h
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memory 86 / 121 GB, ~35 GB headroom -- NOT memory-constrained
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ana-ml2 10.8-15.8 s/it (run-03c.log, the real run)
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-> 604 steps ~= 2.2-2.7 h
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⚠ **6x slower where raw compute predicts 2.7x** (93 TFLOP/s bf16 measured here vs an RTX PRO
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6000 Blackwell's ~250). **Hypothesis, not a measurement:** the limiter is **memory bandwidth**
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— GB10's unified LPDDR5X against dedicated graphics memory, on a workload built to be
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bandwidth-hungry (seq 16384 with gradient checkpointing, which trades compute for memory
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traffic by design). Confirming it needs a bandwidth-bound microbenchmark that has not been run.
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⚠ **THE GX10 IS A CAPACITY BOX, NOT A THROUGHPUT BOX.** 121 GB holds models nothing else in the
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fleet can. It is **not** the box to move a time-sensitive run *to*.
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### ⚠ THE RECOMMENDATION REVERSES THE PLAN ON FILE — run 3c belongs on ana-ml2
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The standing plan was "move run 3c to the GX10; it is the power answer rather than a power
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triage." **Measurement kills that.** Run 3c did not die because ana-ml2 is unreliable — it died
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because `save_steps` was **100** and the 2026-08-26 breaker trip landed at **step 80**, so no
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checkpoint existed. **`save_steps` is now 50.** A power event costs **≤50 steps ≈ 11 min** and
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resumes. Trading 2.5 h for 13.3 h buys insurance against a risk already engineered out.
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### Probe methodology — five launches, five distinct causes, all recorded
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1. reaped SSH long remote job piped through a reapable foreground ssh.
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FIX: setsid nohup, log ON the box. Work survived; output did not.
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2. bare LoRA target names q_proj/k_proj/... also match Gemma-4's VISION and AUDIO towers,
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whose projections are Gemma4ClippableLinear -- PEFT cannot wrap
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them. FIX: the real run's 205 fully-qualified names, sha recorded.
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3. missing python3-dev Triton JITs a C shim at FIRST USE and needs Python.h. Torch
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imports, model loads, LoRA attaches, THEN step 1 dies with a bare
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CalledProcessError -- Triton devnulls the compiler's stdout.
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4. naive-loss OOM (32 GiB) the 262,144-wide vocab x 32,768 positions logits tensor in fp32.
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⚠ NOT a GX10 limit -- the harness docstring says it OOMs "on a
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95.60 GiB card (measured)", i.e. on ana-ml2 too.
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5. self-inflicted VRAM leak a stuck orphan held 80 GB while PyTorch reported 0 bytes
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allocated; every relaunch was doomed before it started and blamed
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the NEW run. ⚠ ASSERT THE GPU IS CLEAR BEFORE EVERY LAUNCH.
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### ⚠ THE BACKEND-DELTA TRAP WAS PRESENT AND I FIRST DECLARED IT ABSENT
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CLAUDE.md records two frontier-panel conclusions voided by a benchmark and a trainer having
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silently different attention backends. I checked for it by asking whether **flash-attn was
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installed** — the wrong discriminator entirely — and reported "no delta". The harness sets
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**`ATTN_IMPLEMENTATION = "flex_attention"`** explicitly in code, with tuned kernel options; its
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own comment records peak 74.3 GiB under flex vs sdpa's 79.71.
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⚠ **Read the configured value in the code. Absence of an alternative is not evidence of the
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default.** The probe now requests flex_attention and reads `_attn_implementation` back off the
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loaded model. **RESOLVED: flex_attention — it compiles and runs on sm_121**, which was a real
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open risk (flex compiles through Triton; sm_121 is not in torch's arch list).
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### Faithfulness of the probe (what makes the number comparable)
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LoRA the real run's 205 fully-qualified modules, sha256 c9ee070c0d67eb08
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loss path copied from the harness: trunk hidden states, DROP IGNORE_INDEX before the
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head, chunk lm_head+CE at loss_chunk_tokens=1024 under checkpoint, softcap 30.0
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loss ratio 28.4% of positions masked to match the real 13,310,930 / 18,600,057 loss/ctx
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ratio -- observed 23,351-23,638 loss tokens/step against a 23,449 target
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tokens sampled [1000, 250000) to stay below every multimodal special token
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(boi 255999, boa 256000, image 258880, audio 258881, eoi/eoa/video 258882-4)
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warmup first 2 steps discarded; sm_121 JITs from sm_120 PTX on first use
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