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ScottW514
f274eb1137
On the bench the test tripped the gate and then failed its off leg: its M9 and the next M8 were 300 ms apart, the GRBL client reports at 1 Hz and the engine samples at 1 Hz, so the engine never saw the session end, the next M8 was not a new run start, and the ceiling was never re-read. Every M9 now waits for the engine's phase to leave run before the next M8, and an M8 refuses to open on a session still running. The failure path restores the settings and then cycles a run session too: the engine reads settings at run start only, so restoring the file alone left the bench holding OVERTEMP against the test's 6 C ceiling until the operator's next job. The scripted engine in the host cases models the report period, and two cases pin both rules.