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ScottW514
61b2913e3a
The de-risk drill ran on the bench: the IG registers program and poll over i2c-dev (I2C_SLAVE_FORCE) with st_accel bound, raw reads intact, so the crash detector is forgectrl-only (BRINGUP item 6, CAMPAIGN-LOG 2026-08-31). The drill found the IG needs a running ODR: st_accel leaves the part in power-down between one-shot reads. The script now saves CTRL1, runs the window at 800 Hz, and restores it on exit; its old ODR test checked the axis-enable bits instead of the ODR bits. No catalog consequence: the change is a bench drill script, its bench page text, and the docs record of the drill; no shipped behavior changes.