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ScottW514
1a5fc27530
BRINGUP.md is the cold-start reference: project status (audit phases 0-5 complete, Phase 6 spike achieved - first grblHAL-commanded motion 2026-07-26), bench/board access, build+deploy procedures, the step backend runbook incl. the required analog machine config, the measured hardware facts bank, and the ordered next-work list. scripts/bench/ preserves the hardware-verification tools (underrun feeder, end-of- data protocol bench, PWM register check, cross-build scripts).
33 lines
1.4 KiB
Python
33 lines
1.4 KiB
Python
#!/usr/bin/env python3
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"""Phase 3.2 software check: laser PWM carrier frequency from PWM2 registers.
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Expected with the fsl,extra-prescale=<13> fix: PWMCR prescaler divider = 13,
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PWMPR ~125 (127 counts - 2), effective carrier = perclk / (13 * 127) ~= 40 kHz.
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Without the fix: divider 1 -> ~520 kHz (audit M8). Safe: read-only register
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inspection; the laser PWM output feeds the PSU power input, firing stays gated
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by the hardware chain. The definitive gate remains the scope on LASER_PWM.
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"""
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import mmap, struct
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PWM2_BASE = 0x02084000
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PERCLK_HZ = 66_000_000 # ipg_high; cross-check against the EPIT rate in dmesg
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with open("/dev/mem", "rb") as f:
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m = mmap.mmap(f.fileno(), 4096, mmap.MAP_SHARED, mmap.PROT_READ,
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offset=PWM2_BASE)
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cr, sr, ir, sar, pr = struct.unpack("<5I", m[:20])
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m.close()
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prescaler_field = (cr >> 4) & 0xFFF
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divider = prescaler_field + 1
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period_counts = pr + 2
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freq = PERCLK_HZ / (divider * period_counts) if period_counts else 0
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enabled = cr & 1
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print(f"PWMCR=0x{cr:08x} PWMSAR={sar} PWMPR={pr} enabled={bool(enabled)}")
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print(f"prescaler divider = {divider} (field {prescaler_field})")
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print(f"period counts = {period_counts}")
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print(f"carrier frequency = {freq/1000:.2f} kHz")
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ok = divider == 13 and 120 <= period_counts <= 135 and 38_000 <= freq <= 42_000
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print(f"\n{'PASS' if ok else 'FAIL'}: expected divider 13, ~127 counts, ~40 kHz")
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