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A firmware decode of the head MCU (recorded in CAMPAIGN-LOG) shows the factory head crash detector and the head IRQ accel_irq source are one mechanism: the head accelerometer (LIS2HH12) has an on-chip interrupt generator the factory arms per job from the HA* header tags (bit-exact onto its registers) and reads by polling IG_SRC1; its INT wires to the head MCU and surfaces as reg 0x05 b1 behind HEAD_IRQ, which is level-driven off the MCU's latched reg 0x02 and dormant until the SoC arms an edge in reg 0x03/0x04. Facts bank: add "The head MCU flag register and HEAD_IRQ", "The head accelerometer", "Beam detect in the head MCU" (correcting the thinner entry: reg 0x05 has a fourth input and a b7 processed verdict we do not expose; beam_detect_digital is the raw comparator, not the verdict). Next work: merge items 6 and 8, renumber 12 to 11, repoint the trailer. CAMPAIGN-LOG: dated entry recording the decode. Docs only.