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BRINGUP: merge the head crash detector and head IRQ into one item
A firmware decode of the head MCU (recorded in CAMPAIGN-LOG) shows the factory head crash detector and the head IRQ accel_irq source are one mechanism: the head accelerometer (LIS2HH12) has an on-chip interrupt generator the factory arms per job from the HA* header tags (bit-exact onto its registers) and reads by polling IG_SRC1; its INT wires to the head MCU and surfaces as reg 0x05 b1 behind HEAD_IRQ, which is level-driven off the MCU's latched reg 0x02 and dormant until the SoC arms an edge in reg 0x03/0x04. Facts bank: add "The head MCU flag register and HEAD_IRQ", "The head accelerometer", "Beam detect in the head MCU" (correcting the thinner entry: reg 0x05 has a fourth input and a b7 processed verdict we do not expose; beam_detect_digital is the raw comparator, not the verdict). Next work: merge items 6 and 8, renumber 12 to 11, repoint the trailer. CAMPAIGN-LOG: dated entry recording the decode. Docs only.
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@@ -1006,21 +1006,56 @@ is committed.
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firing) and is the only live HV telemetry on this PSU (`hv_voltage` is
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grounded). `cnc/laser_pgood_sampled` stays 0 through real cutting: not usable
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here.
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- **The head IRQ and beam detect.** The EV_SW `head` bit (GPIO3_22, factory
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pad HEAD_IRQ; the panel's "Head sense" row) is the head MCU's attention
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line: idle LOW with a healthy head, pulsing on a head reboot (hence the
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60 ms DT debounce), floating to the SoC pull-up with no head. The raw level
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is not a presence signal; presence is the head answering at I²C 0x47. The
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factory app answers the IRQ by reading the head's flag register (reg 0x05:
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b0 hall_sensor, b1 accel_irq, b2 beam_detect_digital), so there are exactly
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three candidate sources. The beam detector reads back as the digital flag
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plus an analog level (reg 0x16), both head sysfs attrs: `beam_detect_analog`
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sits near 1834 dark and reads 2600 to 2890 during S300/S400 fire (the
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acceptance suite's mark witness), unmeasured at low fire energies. The
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tunable detection model (regs 0x22 to 0x2a) is written with fixed values at
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probe and not exposed as attrs. Whether the factory enables beam detect in
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production is unknown: the v2.6.0 app carries a complete but config-gated
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subsystem.
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- **The head MCU flag register and HEAD_IRQ.** The head MCU (a KL17 at
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i2c-3 @0x47, I²C-slave-only to the SoC) samples four head-local GPIO input
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levels once per main loop into the read-only flag register 0x05: b0
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`hall_sensor` (Z home), b1 `accel_irq` (the head accelerometer's INT pin, a
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bare level), b2 `beam_detect_digital` (the raw beam comparator), and a
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fourth, unidentified input the driver does not expose (candidate second
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hall or head-present). A fifth flag, b7, is the processed beam-detect
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verdict (below). The EV_SW `head` bit (GPIO3_22, factory pad HEAD_IRQ; the
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panel's "Head sense" row) is the MCU's PTC2 output driven back to the SoC:
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it is level-driven and mirrors reg 0x02 (the latched IRQ status) being
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nonzero. reg 0x02 latches edges on the reg-0x05 bits, but only those the
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SoC arms through reg 0x03 (rising) and reg 0x04 (falling) edge-enable masks,
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and it is read-to-clear. So the SoC chooses which head events raise the IRQ,
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answers it by reading reg 0x02 to identify and clear, and reads reg 0x05 for
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live levels. ForgeFIRM writes none of 0x03/0x04 and reads neither 0x02 nor
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the fourth-input and b7 flags, so the head IRQ is dormant by construction:
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GPIO3_22 sits idle low with a healthy head, pulses on a head reboot (hence
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the 60 ms DT debounce), and floats to the SoC pull-up with no head. The raw
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level is not a presence signal; presence is the head answering at I²C 0x47.
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- **The head accelerometer** is an ST LIS2HH12 (i2c-3 @0x1e; the board and
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lid accels are the same part at i2c-3 @0x1d and i2c-0 @0x1e), read raw by
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the mainline `st,lis2hh12` driver for motion liveness. The part has a full
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on-chip interrupt generator: per-axis 8-bit thresholds (IG_THS_X1/Y1/Z1,
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regs 0x32/0x33/0x34), a duration counter (IG_DUR1 0x35), a per-axis event
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register (IG_SRC1 0x31), full scale ±2/4/8 g (CTRL4 FS), two independent
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generators (IG1/IG2). The factory arms this generator per job from the
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pulse header's HA* accel tags, which map bit-exactly onto its registers
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(per-axis threshold → IG_THS, duration → IG_DUR1, full scale → CTRL4,
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period/decimator → CTRL5/ODR), and reads trips by polling IG_SRC1 over the
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accel's own bus (per-axis x/y/z alerts), running two tiers. So the factory
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head crash detector is the sensor's own interrupt generator, and the HA*
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thresholds are LIS2HH12 register values at the full scale the HAsr tag sets,
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not values in an unknown unit. The INT pin does not reach the SoC as a host
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interrupt: it wires to the head MCU's GPIO and surfaces only as reg 0x05 b1,
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and neither the factory DTS (head I²C `status = "disabled"`, the accel
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driven from userspace) nor ForgeFIRM's DTS gives the accel an `interrupts`
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property. ForgeFIRM neither arms the generator nor reads b1; it only polls
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raw samples.
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- **Beam detect in the head MCU.** PTE16 into ADC0 gives reg 0x16, the raw
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analog level (`beam_detect_analog`, a head sysfs attr): near 1834 dark, 2600
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to 2890 during S300/S400 fire (the acceptance suite's mark witness),
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unmeasured at low fire energies. A float EWMA/CUSUM over the coefficients
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`LAMBDA_K` (0x07ae), `LAMBDA_T` (0x1999 = 0.1), `THETA_R` (0x20), `THETA_T`
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(0x28), `E_T` (0x60) feeds an N-of-M sliding-window verdict in reg 0x05 b7;
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a DAC (reg 0x1e, default 0x3ff) sets a comparator threshold whose raw output
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is reg 0x05 b2 (`beam_detect_digital`). The head probe writes the five
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coefficients, but they are the firmware's own power-on defaults. The driver
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exposes b2 (raw comparator) and reg 0x16 (raw analog), not b7 (the processed
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verdict). Whether the factory enables beam detect in production is unknown:
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the v2.6.0 app carries a complete but config-gated subsystem.
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- **Switches**: truthy = closed/OK for lid/doors/button. **SW_INTERLOCK is
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INVERTED**: the remote interlock (the regulatory 2-pin lockout connector)
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reads ACTIVE only when the loop is OPEN. Basic/Plus — including the bench
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@@ -1173,14 +1208,36 @@ Open items only. Anything closed is in `CAMPAIGN-LOG.md`.
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5. **Update system Phase 5 — recovery refresh.** The remaining phase of
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`docs/UPDATE-SYSTEM.md` (a refreshed recovery image in boot0); Phases 0–4
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are done.
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6. **Head-IRQ source validation (exploratory, not gating).** Which of the
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three head flag sources drives the EV_SW `head` bit during a cut is
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unknown; the working hypothesis is the beam-emission detector (the facts
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bank, "The head IRQ and beam detect"). Owed, cheap and opportunistic
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during live fire: log EV_SW head-bit edges plus
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`head/beam_detect_digital|_analog` while firing, low fire energies
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included. If the beam flag level-holds the IRQ, the panel row asserts
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during sustained emission.
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6. **Head accelerometer crash detector, and the head IRQ (planned;
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exploratory).** The factory's head crash detector is the head
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accelerometer's own on-chip interrupt generator, armed per job from the
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HA* header thresholds and read by polling the sensor; the head IRQ is the
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coarse aggregate path to that event and the others (hall, beam). Both are
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one mechanism (the facts bank, "The head MCU flag register and HEAD_IRQ"
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and "The head accelerometer"), which is why these two items are one. The
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detector is adopted, not measured from scratch: the earlier plan to
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bench-measure a filter is moot now that the HA* thresholds are known to be
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LIS2HH12 register values at a known full scale.
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Owed for the detector: program the LIS2HH12 interrupt generator over
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i2c-3 (per-axis threshold, duration, full scale) and poll IG_SRC1 for a
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latched per-axis trip, on the factory's two-tier shape (an alert that
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pauses, an abort that fails). The rail-contact signature in the facts
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bank sets the first threshold in register units; a pause on contact is
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the first use. ForgeFIRM already reads the head accel raw for liveness,
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so this shares the bus, not new hardware; the one wrinkle is reaching the
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interrupt-generator registers past the bound `st_accel` driver (IIO
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events if the driver exposes them, else a direct-register path as the
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retired homing spike used).
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Owed for the head IRQ, only if a coarse hardware interrupt is wanted
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instead of the poll: arm the accel bit in the head MCU (reg 0x03/0x04),
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watch GPIO3_22, and read reg 0x02 to identify and clear. The beam-detect
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verdict (reg 0x05 b7, not currently exposed) is the same mechanism for the
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emission question and stays exploratory: whether the factory enables beam
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detect is unknown, and detection at low fire energies is unverified. A
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cheap opportunistic check during live fire still stands: log GPIO3_22
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edges plus `head/beam_detect_digital|_analog` while firing.
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7. **Gapless pause and resume in GRBL mode (planned).** A pause leaves a mark
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in the cut. With laser mode on, the core stops the beam at the start of the
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@@ -1213,16 +1270,7 @@ Open items only. Anything closed is in `CAMPAIGN-LOG.md`.
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raster line does to it, and how it composes with the armed window's disarm
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grace across a long hold.
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8. **Head crash and rail-contact detector (planned).** Bench-measured from
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scratch, not adopted from the pulse header: the factory's per-axis
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alert/abort thresholds arrive in every header in a unit and behind a
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filter that are not known, so the rail-contact signature in the facts
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bank is the starting point and the header values are only a cross-check
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once the units are established. A pause on contact, on the factory's
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shape (an alert tier that pauses, an abort tier), would be the first
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use.
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9. **A sender change while a job runs: discussion.** Today a sender that
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8. **A sender change while a job runs: discussion.** Today a sender that
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disconnects mid-job leaves the motion running to the end of what the
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controller holds, with the window closed and fire suppressed (the
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consent belonged to the displaced session), so the job finishes dark
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@@ -1238,7 +1286,7 @@ Open items only. Anything closed is in `CAMPAIGN-LOG.md`.
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running on leaves a clean stop position but wastes the piece. Decide
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with the gapless pause and resume item (7), which owns the resume
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mechanics.
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10. **The flow check on a second machine.** The lit-tube flow check is in
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9. **The flow check on a second machine.** The lit-tube flow check is in
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place: the engine reads means, takes its baseline under the run
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profile, and takes the tube's share off (`cool_laser_heat_cw`,
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`cool_laser_heat_density`); `cooling.flow-under-load` is the catalog's
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@@ -1248,7 +1296,7 @@ Open items only. Anything closed is in `CAMPAIGN-LOG.md`.
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far): re-measure the two heat coefficients and the machine's
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air-assist offset; and if a lit check still trips, the
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void-on-emission design with the tube as its own flow tracer.
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11. **Laser power-good: what the line means.** `cnc/laser_pgood` and its
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10. **Laser power-good: what the line means.** `cnc/laser_pgood` and its
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sampled count are defined in the UAPI (active low, one sample every
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~3.9 ms), the facts bank records that the sampled count reads 0 through
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real cutting, and the cooling engine warns
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@@ -1260,7 +1308,7 @@ Open items only. Anything closed is in `CAMPAIGN-LOG.md`.
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scope against `hv_current` through an armed cut, its meaning written
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into the facts bank and the UAPI, and then either a warning that means
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something or no warning.
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12. **Initial commissioning: measure and set the machine's own numbers
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11. **Initial commissioning: measure and set the machine's own numbers
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methodically.** Every tunable that was measured on the bench machine
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and shipped as a default varies from machine to machine: the flow
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check's bands and `cool_flow_rise`, the tube's heat coefficients
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@@ -1296,7 +1344,7 @@ covers the warm-up hold), the supply temperature window (the service sends
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the whole ADC range and the factory binds it to nothing; the supply is
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watched per job instead), the head, lid, interconnect and fused temperature
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ceilings (no sensor at those locations; the chassis is watched per job), the
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head accelerometer thresholds (item 8), the lid IR thresholds (the fire
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head accelerometer thresholds (item 6), the lid IR thresholds (the fire
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watch runs on local knobs; the header values stay ignored), the
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HV current caps (the sampled emission witness covers the idle case, and HV
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current is ranged per job), the thermal report upload conditions and the
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